# get or set environment variable 
#set PRJ_ROOT_DIR $env(PRJ_ROOT_DIR)
set PRJ_ROOT_DIR ../../..
#set PRJ_TEMP_DIR $env(PRJ_TEMP_DIR)
set PRJ_TEMP_DIR ../../../../temp

# set work directory variable
set SCRIPT_DIR      $PRJ_ROOT_DIR/script
set lib_work_dir    $PRJ_TEMP_DIR/cbb_ut

# DUT and testbench files, don't use {} for tb_list outer quotes
set tb_list "
    {-f $PRJ_ROOT_DIR/rtl/cbb/cbb.f}
    {../tb/xxx_regs.v}
"
# netlist files after map, don't use {} for nl_list outer quotes
set nl_list "
    {$PRJ_ROOT_DIR/fpga/outflow/test.map.v}
"

# testcase files, don't use {} for tc_list outer quotes
set tc_list "
    {../tc/tc_single_tone.sv    }
    {../tc/tc_arith.sv          }
    {../tc/tc_prbs.sv           }
    {../tc/tc_ldpc_dbg.sv       }
    {../tc/tc_rsc_dbg.sv        }
    {../tc/tc_rsc_sch.sv        }
    {../tc/tc_rsc_mch.sv        }
    {../tc/tc_sec_only.sv       }
    {../tc/tc_sec_ded.sv        }
    {../tc/tc_sef_sp.sv         }
    {../tc/tc_sef_tp.sv         }
    {../tc/tc_fbm_sda.sv        }
    {../tc/tc_xxx_regs.sv       }
    {../tc/tc_sync_pls.sv       }
    {../tc/tc_sync_bus.sv       }
    {../tc/tc_sync_req.sv       }
    {../tc/tc_add_all.sv        }
    {../tc/tc_tiny_afifo_recover.sv     }
    {../tc/tc_tiny_afifo.sv     }
    {../tc/tc_tiny_afifo_1.sv   }
    {../tc/tc_tiny_afifo_2.sv   }
    {../tc/tc_tiny_afifo_3.sv   }
    {../tc/tc_tiny_sfifo.sv     }
    {../tc/tc_tiny_sfifo_1.sv   }
    {../tc/tc_tiny_sfifo_2.sv   }
    {../tc/tc_tiny_sfifo_3.sv   }
    {../tc/tc_sfifo.sv          }
    {../tc/tc_fifo_prefetch_stuff.sv    }
    {../tc/tc_cfifo_ctrl.sv     }
    {../tc/tc_cfifo_ctrl1.sv    }
    {../tc/tc_cfifo_ctrl2.sv    }
    {../tc/tc_cfifo_ctrl3.sv    }
    {../tc/tc_cfifo_ctrl4.sv    }
    {../tc/tc_cfifo_ctrl5.sv    }
    {../tc/tc_reg_slicer.v      }
    {../tc/tc_n2o.v             }
    {../tc/tc_arb_rr.v          }
    {../tc/tc_arb_wrr.sv        }
    {../tc/tc_crc.sv            }
    {../tc/tc_sym_coe_fir.sv    }
    {../tc/tc_pi_nco.sv         }
    {../tc/tc_pid_lp.sv         }
    {../tc/tc_ssr_fdf.sv        }
    {../tc/tc_spi.sv            }
    {../tc/tc_i2c.sv            }
    {../tc/tc_amba.sv           }
    {../tc/tc_dbg.sv            }
"

# vlog and vsim commands
set vlog_basic_cmd " \
    vlog -mfcu -incr -sv +cover=sbcef -timescale 1ns/100ps +libext+.v+.sv \
    +incdir+$PRJ_ROOT_DIR/sim/lib+../tb+$PRJ_ROOT_DIR/rtl/cbb/func \
    +define+CBB_ASSERT_ON +define+CBB_DEBUG_ON +define+U_DLY=#0.1 +define+SYNC_DFF_INSERT_RANDOM_DELAY \
"

set vsim_basic_cmd "vsim -onfinish final tc -wlf $lib_work_dir/tc.wlf"

set vlog_dbg_opt  ""
set vsim_dbg_opt  "-voptargs=+acc=ablnprv -do {radix hex;log -r /*;}"

set vlog_rgrs_opt "+define+REGRESS_MODE"
set vsim_rgrs_opt "-do {radix hex;run -all;}"

set vlog_cov_opt  ""
set vsim_cov_opt  "-coverage"

# main tcl proc
source $SCRIPT_DIR/run_vsim.tcl
